Verification Engineer Responsibilities and Duties

Define, design and execute mixed analog-digital product validation utilizing high level languages.

Prepare verification environment as well as plans for mixed-signal blocks utilizing Cadence AMS.

Conduct regression and ensure to cover based verification.

Define, prepare and debug mixed-signal product test specifications as well as patterns.

Collaborate with system-level and design verification engineers, SW developers and IP developers to verify SoC designs on entire aggressive time schedules.

Contribute actively to system-level verification of Mixed-Signal FPGA solutions.

Prepare detailed technical documentation as well as design review material.

Ensure to understand IC industry practices, company methods and policies.

Write verification plans, specifications and documentation.

Prepare test bench as well as automatic regression plans.

Head responsibility for verifications, simulations and circuit debugging.

Interact with cross-functional team to spread around world to work together in entire verification related tasks.

Head responsibility for Testbench development for chip level and unit level verification.

Ensure to test component like checkers, drivers and monitor development.

Design, develop, modify and evaluate electronic, mechanical components or electro-mechanical.